QS1R Software Defined Receiver: (Click on picture above for larger version.) Features: 16 bit 130 MSPS ADC HPF, LPF, RF AMP Switchable Front End 0-31.5 dB Attenuator in 0.5 dB steps Cyclone II FPGA Two AD6620 DDC co-processors USB 2.0 480 Mbps High Speed Interface to PC 0.1 to 33 MHz coverage (0.1 to 65 MHz extended) RX bandwidths from 33 MHz to 1kHz Two independent RX channels anywhere in 0.1 to 33 MHz 6.00" X 4.00" board size Single +12V 1A supply Open Source Software and Hardware Availability: Projected late January to mid-February 2007
Here I will post information about the current status of SRL-LLC projects and other general SDR information. SRL-LLC website: www.srl-llc.com
Comments
I've had great luck with the TLK2701, TLK2711 and the TLK3101 (which is pin compatible also). The TLK27xx parts are easier to use than the TLK2501 because they also allow encoding/decoding of K codes which are useful for packet indicators/sync/status stuff.