HPSDR Progress:
I am now able to configure the Spartan 3 FPGA over USB. I switched from slave parallel mode to slave serial configuration loading. This will make the FX2 firmware easy to use with Altera Cyclone FPGAs in addition the the Xilinx Spartan 3.
I am in the process of getting samples of Linear Technology's LTC2208 16 bit, 135 MSPS ADC. I still plan to develop a QSD based RX board using the TI PCM4202 as the ADC - So there will be a high bandwidth path as well as a low bandwidth path in the HPSDR. The LTC2208 board will probably get it's own FPGA to do DDC. The DDC's ouput will then feed the Spartan 3 which will be responsible for performing the second part of the DSP chain.
Verilog Projects for the Xylo Board:
I set up a folder on my server that people can browse . It will contain various verilog projects that can be tried on the Xylo board for educational purposes.
http://www.philcovington.com/FPGA/
I am now able to configure the Spartan 3 FPGA over USB. I switched from slave parallel mode to slave serial configuration loading. This will make the FX2 firmware easy to use with Altera Cyclone FPGAs in addition the the Xilinx Spartan 3.
I am in the process of getting samples of Linear Technology's LTC2208 16 bit, 135 MSPS ADC. I still plan to develop a QSD based RX board using the TI PCM4202 as the ADC - So there will be a high bandwidth path as well as a low bandwidth path in the HPSDR. The LTC2208 board will probably get it's own FPGA to do DDC. The DDC's ouput will then feed the Spartan 3 which will be responsible for performing the second part of the DSP chain.
Verilog Projects for the Xylo Board:
I set up a folder on my server that people can browse . It will contain various verilog projects that can be tried on the Xylo board for educational purposes.
http://www.philcovington.com/FPGA/
Comments
Whay was Verilog chosen? was it because it looks a lot like C/C++/C#?
I just would like to know...
N8VB