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Showing posts from December, 2006

QuickSilver QS1R Software Defined Receiver Prototype

QS1R Software Defined Receiver: (Click on picture above for larger version.) Features: 16 bit 130 MSPS ADC HPF, LPF, RF AMP Switchable Front End 0-31.5 dB Attenuator in 0.5 dB steps Cyclone II FPGA Two AD6620 DDC co-processors USB 2.0 480 Mbps High Speed Interface to PC 0.1 to 33 MHz coverage (0.1 to 65 MHz extended) RX bandwidths from 33 MHz to 1kHz Two independent RX channels anywhere in 0.1 to 33 MHz 6.00" X 4.00" board size Single +12V 1A supply Open Source Software and Hardware Availability: Projected late January to mid-February 2007

vSound Update

vSound Status I have been able to get a prototype of the vSound driver to work on Windows Vista beta. I am now waiting until the official release of Vista to continue development on a driver that will work on both XP and Vista. As it looks now, vSound will support Vista and XP only. There will be no support for W2K, NT4, or Win9X/ME operating systems. My main concern is trying to make sure that the vSound driver is compatible with both XP and Vista so I don't have to maintain two different versions based on operating system. There are a lot of changes being made to driver development under Windows and I have been waiting until it stabilizes a little bit more before releasing a beta driver. My best estimate for availability of vSound beta is early next year after Vista systems hit the streets. New QuickSilver QS1R Group Support and discussion group for the new QuickSilver QS1R SDR: To sign up go Here

Some Interesting Links for Decemeber...

Links DSPLINKS - great for learning DSP interactively QUCS - circuit simulator for Linux and Windows LTC SWCAD - circuit simulator for Windows Cell Processor - the processor that power the PS3 SciLab - open source numerical computation Maxima - open source computer algebra system Octave - open source GNU numerical computation Mono - open source .NET Coming Soon! QuickSilver QS1R SDR Receiver/Scope/Spectrum Analyzer Board Based on Linear Technology LTC2208 130 MSPS 16 bit ADC Cyclone II EP2C8 FPGA for DDC processor High Speed USB 2.0 Connectivity Two DDC Co-processors External Clocking capability 6.00" x 4.00" (15.24 x 10.16 cm) board size 0.1-65 MHz Open Source Software