FPGA_USB Board, DipTrace, and Mono

FPGA_USB Board and DipTrace:

I have been using a program called DipTrace to do the schematics and board layout for the FPGA_USB board. After completing my first PCB layout with DipTrace I am very impressed with this program. Questions to the developers are answered very quickly. It has a very intuitive user interface and small learning curve. I had to create a few patterns for smt components that were not in the supplied libraries - the pattern editor is very easy to use. I highly recommend this software if you are looking for a powerful, yet low cost schematic entry/PCB design program. You can download a 30 day evaluation at http://www.diptrace.com

The FPGA_USB board design is now complete. I have ordered the parts for the prototype boards and will soon send the design files to the board house to have the PCBs made. I will post more details about the project soon.

Mono:

I have been doing a little work with Mono (http://www.mono-project.com) on both Windows and Linux. It is very impressive to be able to write a C# program with a GTK# GUI and have it run in Windows and Linux without having to recompile. I am considering recompiling SharpDSP to use Mono and then evaluating the performance of SharpDSP running in Linux. I am using Mono 1.1.8.3 with Suse 9.3

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History of HPSDR Mercury and Quick Silver

History of HPSDR Mercury and Quick Silver Philip Covington, N8VB Early HPSDR and XYLO In 2005 I started a High Performance SDR (HPSDR) project which was to consist of a motherboard carrying a FPGA/USB 2.0 interface and power supply with the provision for plug in modules through 40 pin headers. I had planned a narrow band high dynamic range module based on a QSD/DDS/PCM4202 audio ADC and a wide bandwidth module based on a high speed 16 bit ADC: http://www.philcovington.com/SDR/PICS/HPSDR_FPGA_USB_Board_top1_800600.jpg http://www.philcovington.com/SDR/PICS/HPSDR_FPGA_USB_Board_top4.jpg I soon selected the LTC2208 ADC from Linear Technology. A representative from Linear Technology came across my blog ( http://pcovington.blogspot.com/ ) and offered evaluation boards and samples to support the project. At about the same time my HPSDR project came about, Phil Harman, VK6APH and Bill Tracey, KD5TFD were interested developing a sound card replacement to be used with the SD

QuickSilver QS1R Software Defined Receiver Prototype

QS1R Software Defined Receiver: (Click on picture above for larger version.) Features: 16 bit 130 MSPS ADC HPF, LPF, RF AMP Switchable Front End 0-31.5 dB Attenuator in 0.5 dB steps Cyclone II FPGA Two AD6620 DDC co-processors USB 2.0 480 Mbps High Speed Interface to PC 0.1 to 33 MHz coverage (0.1 to 65 MHz extended) RX bandwidths from 33 MHz to 1kHz Two independent RX channels anywhere in 0.1 to 33 MHz 6.00" X 4.00" board size Single +12V 1A supply Open Source Software and Hardware Availability: Projected late January to mid-February 2007

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