Skip to main content

Short Update

HPSDR_FPGA_USB MainBoard:

I now have almost 100% of the parts for the board and have verified my PCB layout with the QFP208 pattern used by the Xilinx XC3S400 FPGA. I will immediately send the board design files out to be made. It is a 4 layer board measuring 5"x6" with top side silk screen and top/bottom solder mask. All components are on the top side. The most difficult SMT components are the FPGA (QFP208, 0.5mm pitch) and the Cypress FX2 chip (QFP128, 0.5mm pitch). Resistors are all 0805 size and caps are 0805 and 1210 sizes.

The only part that I do not have is the Xilinx XC3S400 FPGA. It is on backorder for 3-4 weeks (or so they claim). It seems that there are just no Spartan 3 chips available right now. What is the problem Xilinx???

Mono:

I have been doing a little work with using mono on Windows and Linux. I was able to compile SharpDSP using SharpDevelop targeting the mono runtime and mcs compiler. I compiled SharpDSP into a library (dll) then copied it over to the Linux machine. I compiled a test C# program that uses the Managed.Windows.Forms in mono 1.1.8.3 to test the SharpDSP library. Both the test program and the dll worked perfectly under both Windows and Linux *without* having to recompile either file that was compiled under SharpDevelop on Windows. This means that I should be able to create a dedicated SoftRock 40 console that will run on both Windows and Linux using SharpDevelop for development (or alternately, MonoDevelop under Linux). The Windows version will continue to use PortAudio. The Linux version will use Jack.

http://www.mono-project.com/Main_Page
http://www.mono-project.com/WinForms

Comments

Anonymous said…
Hi Phil,

The FPGA-USB board sounds very interesting - do you have a block diagram available please?

Phil...VK6APH
7:50 PM
Post a Comment

Popular posts from this blog

History of HPSDR Mercury and Quick Silver

History of HPSDR Mercury and Quick Silver Philip Covington, N8VB Early HPSDR and XYLO In 2005 I started a High Performance SDR (HPSDR) project which was to consist of a motherboard carrying a FPGA/USB 2.0 interface and power supply with the provision for plug in modules through 40 pin headers. I had planned a narrow band high dynamic range module based on a QSD/DDS/PCM4202 audio ADC and a wide bandwidth module based on a high speed 16 bit ADC: http://www.philcovington.com/SDR/PICS/HPSDR_FPGA_USB_Board_top1_800600.jpg http://www.philcovington.com/SDR/PICS/HPSDR_FPGA_USB_Board_top4.jpg I soon selected the LTC2208 ADC from Linear Technology. A representative from Linear Technology came across my blog ( http://pcovington.blogspot.com/ ) and offered evaluation boards and samples to support the project. At about the same time my HPSDR project came about, Phil Harman, VK6APH and Bill Tracey, KD5TFD were interested developing a sound card replacement to be used with the SD...
1 comment
Read more

2323 Wilt

Post a Comment
Read more

RFFE1 Why you may (or may not) need it

RFFE stands for "Radio Frequency Front End" and the "1" stands for the first version (0-62.5 MHz coverage). When I was designing the QS1R board, I had to decide whether to include bandpass filtering and RF amplification on the board. In fact the initial prototypes "RevA" included RF amplification on the QS1R board. Unlike another DDC based direct sampling receiver "Perseus", QS1R was designed to be more than a SW receiver. In addition to a SW receiver, QS1R was meant to facilitate experimentation in the RF spectrum up to at least 300 MHz. I finally settled on a 55 MHz low pass filter (which can be bypassed) and no active components in front of the ADC on QS1R. Any active devices, bandpass filters, or attenuation would be added by a separate board such as the RFFE1. The antenna that I use for my QS1R is a center fed, non-resonant dipole at 50 feet. The total wire length is about 240 feet with only about 100 feet of that running horizontally...
Post a Comment
Read more